Due to the demands of the developments for improving the signal quality and the transmitting rate of the data transmitting devices, the buses between the devices include ISA, EISA, VESA and Micro Channel, as the first generation buses, PCI, AGP, and PCI-X, as the second generation buses and PCI-express as the third generation of the I/O bus with the high performance. The buses are commonly used for interconnecting the peripheral devices of the computing and communicating platform and widely applied to computing mobiles, desktop computers, workstations, servers, embedded computers and the communicating platforms.
The PCI express architecture not only maintains the advantages of the previous two generations of the bus architectures but introduces the new technology of the computer architectures. Unlike the parallel bus architectures, PCI express uses the serial and point-to-point connection type for communicating between two devices. Therefore, the rate for transmitting and receiving data on the buses can be increased considerably. Currently the rate for transmitting and receiving data on PCI express bus can reach 2.5 Gbits per second. Since the transmitting amplitude of the data on PCI express bus should consider length of the transmission line, loss of the signals and different amplitude which the host terminal requires, the dimension of the output amplitude defined in the standard is specifically set. However, under most circumstances, it is in fact unnecessary to have an output amplitude with large dimension to receive and transmit the signals. Therefore, outputting the large amplitude signals represents wasting the unnecessary energy. Nevertheless, if the decreased signal amplitude can not be detected automatically, the signal with micro-amplitude would lead to the risk of disconnection.
In addition, the transmission in serial connection system is a one-way transmission, which means that the transmission path and the reception path are not configured in the same route path. Although the de-emphasis of the transmitter can be adjusted to improve the connection quality, there is no way of knowing the relationship between the receiving quality of the device terminal and the de-emphasis of the host terminal so that the poor quality can not be known once it occurs. If whether the number of Negative Acknowledge (NAK) returned from the device terminal is higher than a threshold is determined to decide whether the de-emphasis of the host terminal should be changed, the adjustment is blindly tested although the connection quality might be improved occasionally. FIG. 1 schematically illustrates a method for improving the connection quality disclosed in the U.S. Pat. No. 7,502,338. The de-emphasis is dynamically adjusted to change the setting of the de-emphasis in step S12-S15. However, there is no way of knowing the property of the circuit board or the device terminal. The connection to the device terminal might be broken if the de-emphasis is adjusted during data transmitting, which might be the condition that a bad setting of the de-emphasis is adjusted to be a worse setting of the de-emphasis. Nevertheless, the disconnection is not allowed during data transmitting in the PCI express architecture. Therefore, the serious consequences of the disconnection might not be prevented.
Therefore, to overcome the drawbacks from the prior art and to meet the present needs, the Applicant dedicated in considerable experimentation and research, and accomplished the “Data Transmitting and Receiving Method and Device for Communicating and System Thereof” of the present invention, wherein the receivable amplitude of the device terminal can be dynamically detected to gradually adjust the transmitted power of the host terminal and the setting value of the receiver of the host terminal can be detected to gradually adjust the de-emphasis to improve the receiving quality of the device terminal. The present invention is briefly described as follows.